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Wafer Bumping
Foundational process technology for high-yield advanced packaging
Connection begins at the wafer.
Wafer bumping technology delivers significant advantages in performance, form factor, and cost for semiconductor packages.
Inside the Technology
Broad experience across wafer bump alloys and processes, including printed bump, ball drop, and plated approaches
Support for eutectic, lead-free, and copper pillar bump alloys
Wafer bumping and redistribution services for 200mm and 300mm wafer sizes
Enablement of full turnkey advanced flip chip and wafer-level packaging solutions
Applications
AI
Data Centers
Blockchain
ADAS
AI
Data Centers
Blockchain
Explore All Technologies
Wirebond Packaging
Reliable, cost-effective interconnects trusted in high-volume manufacturing
Flip Chip Packaging
High-density, high-performance interconnects for advanced miniaturization
Wafer Bumping
Foundational process technology for high-yield advanced packaging
Wafer Level Packaging
Advanced performance in ultra-compact form factors
System-in-Package (SiP)
High-density integration without trade-offs in performance or footprint
MEMS & Sensors Packaging
Compact, integrated packaging for intelligent sensing and control
2.5/3D Packaging
Higher density, better performance, and more efficient integration
