We offer a comprehensive platform of advanced and innovative wafer level technologies to meet the increasing market demand for next generation devices with higher levels of integration, increased functionality and compact sizes. These include:
- • Fan-in Wafer Level Packaging (FIWLP): eWLB
- • Fan-out Wafer Level Packaging (FOWLP): WLCSP and eWLCSP™
- • Integrated Passive Devices (IPD)
- • Through Silicon Via (TSV)
Our comprehensive wafer level technology platform provides customers with a wide range of choices for 2D, 2.5D and 3D package integration in advanced mobile devices such as smartphones and tablets. Additionally, STATS ChipPAC’s innovative approach to WLCSP manufacturing, known as the FlexLine™ manufacturing method, is a significant paradigm shift from conventional wafer level manufacturing, and delivers an unmatched level of flexibility and cost savings for both Fan-In and Fan-Out wafer level packaging.