System level performance metrics such as reflections, cross-talk, propagation delay, skew, etc. on a signal path and those such as voltage dips and bounces on a power delivery path are key indicators of the acceptability of a package design. It is important to verify if the package’s electrical performance stays within the margins allowed in the system noise and timing budgets. S-parameter models of interconnects or single/multi-section lumped element equivalent circuits fitted to those S-parameters can be directly plugged into system models for an accurate prediction.
STATS ChipPAC uses Ansoft Designer and Keysight ADS to perform end-to-end system simulations, in time domain and/or frequency domain, that can include device models from customers/vendors and circuit/behavioral models for interconnects. The timing and noise data output from such simulations enables our customers to make intelligent package design tradeoffs quickly throughout the package development cycle.