eWLCSP™ (a FIWLP Technology)

encapsulated Wafer Level Chip Scale Package (eWLCSP)

The combined benefits of superior quality, lower cost structure and low risk, seamless conversion path make this innovative encapsulated WLCSP technology a compelling value proposition over standard WLCSP.

Encapsulated Wafer Level Chip Scale Package (eWLCSP^TM) features a back and sidewall coating on the die for an increased level of durability and reliability over traditional WLCSP designs. The eWLCSP^TM structure is identical to a conventional WLCSP product with the addition of the protective sidewall coating.

Advantages of eWLCSP include:

Innovative FlexLine manufacturing approach delivers compelling cost reductions over standard WLCSP
Seamless conversion between fan-in and fan-out designs with the same basic package platform
Unique WLP manufacturing approach independent of incoming silicon wafer diameter
Quality built in by design delivers robust, reliable WLCSP solution

A Robust WLP Technology: eWLCSP

eWLCSP offers significant structural advantages over traditional WLCSP designs. As a bare die package, WLCSP is regularly exposed to potential cracking, chipping and handling issues that can occur before or during the SMT assembly process. This is particularly true for advanced node products where the die is very thin and dielectric layers are extremely fragile. eWLCSP is equivalent to a conventional WLCSP product with the addition of a thin protective coating on the backside and four sidewalls of the die, achieving increased durability and reliability within the standard WLCSP size specification.

Encapsulation offers a variety of advantages:

Mechanical protection from die chipping, cracking and other handling issues
Optical protection where needed
Safeguards the silicon during socket insertion for test
Higher quality due to significant increase in component break strengths

Ease of Conversion, Lower Costs

Customers can seamlessly transition from standard WLCSP to an eWLCSP design or a fan-out design within the same basic package platform. A product currently using a conventional WLCSP process can be converted to eWLCSP without a silicon design change, regardless of the current silicon wafer diameter. 300mm devices transitioning to advanced silicon nodes with fragile dielectric layers will especially benefit from conversion to eWLCSP. The FlexLine method can reduce WLCSP costs by 15-30% when using the optimum design requirements for WLCSP devices; e.g., 200mm incoming wafers can be reconstituted into 300mm or larger carrier sizes, providing customers with the advantage of size scaling. Further per-unit cost reductions are achieved as the carrier size increases.

eWLCSP Features

Process

Wafer agnostic process normalises wafer diameter to uniform processing size making incoming wafer size irrelevant
All processing performed in wafer form before dicing
eWLCSP structure identical to conventional WLCSP with exception of protective sidewall coating
Final back grind thins the package to desired thickness
Backside surface can be covered with mold compound, exposed with grind process or laminated with protective film
Spin-on low temp curable polymers
Standard photolithography; Plated Cu RDL, Plated Cu UBM
At least 30um routing space at package edge compared to Si WLCSP
Typical body thickness: ~300um
Same body sizes available as WLCSP (qualified up to 6x6mm); eWLCSP die size can be scaled beyond 6x6mm
Ball pitch 0.50mm, 0.40mm, 0.35mm
Fan-out panel/wafer level test before dicing
Package singulation without touching Si after testing

QUALITY

Polymer sidewall offers mechanical protection from die chipping, cracking and other handling issues
Greater than 50% increase in die strength over traditional WLCSP structures
Advanced dielectrics provide equal/better reliability and performance
Benefits optimal for larger WLCSP die sizes
Passes standard CLR, BLR, temperature cycle on board (TCoB) and drop test (equivalent to WLCSP)

COST

Drop-in replacement offers low risk, seamless conversion path from standard WLCSP
Increased savings as panel sizes increase
FlexLine process qualified at advanced silicon nodes down to 22/20nm

eWLCSP Market Applications & Drivers

eWLCSP is a compelling solution for space constrained mobile devices and new applications such as wearable technology and automotive applications.