Thin Profile Quad Flat Pack (TQFP)

The Thin Profile Quad Flat Pack (TQFP) belongs to STATS ChipPAC’s QFP family. At 1.0mm body thickness, the TQFP is the thinnest package in the QFP family. This thin package is made possible by a well controlled low loop wire bonding process and package warpage control during the molding process. TQFP is suitable for mainstream cost sensitive applications where thickness and weight are premium.

STATS ChipPAC also offers the TQFP in an Exposed Pad configuration (TQFP-ep). This is a thermally enhanced version of the TQFP package. Thermal enhancement is achieved by means of an exposed die pad, which can be soldered to a mother PC board for effective heat removal and grounding, if needed. This enhanced thermal package is made possible by a deep downset die pad leadframe design.

The TQFP is available in stacked die configurations. TQFP-ep-SD is a thin profile exposed pad version with enhanced thermal performance. STATS ChipPAC’s chip stacking technology allows the integration of multiple ICs within a single package to improve package performance and functionality while reducing overall package size and cost. The die to die wire bonding capability enables device/signal integration to improve electrical performance and reduce overall package I/O requirements. TQFP-SD, with nominal package thickness of 1.00mm, is suitable for a variety of product applications.

Features (general)

  • Body Sizes: 10 x 10mm to 16 x 16mm
  • Package Height: 1.0mm
  • Lead Counts: 44L to 144L
  • Lead Pitch: 0.50mm to 0.40mm
  • Available in gold or copper wirebond versions
  • Limited number of open tool leadframe and die pad sizes available
  • JEDEC standard compliant
  • Lead-free, Green and Low Alpha materials sets available

Features (stacked versions)

  • Combining devices into one package reduces PCB real estate and cost
  • Options for mixed technologies, 2 or more stacked dice
  • Increased sub-system performance by integrating multiple chips into a single package
  • Die to die bonding capability for device/signal integration
  • Fine pitch bonding capability
  • Exposed pad provides enhanced thermal performance
  • Low profile package thickness of 1.00mm (TQFP-ep-SD)
  • Lead pitch ranges from 0.80mm to 0.40mm
  • Pin counts from 100 to 128 leads (TQFP-ep-SD)


  • ASIC
  • DSP
  • Gate Array
  • Logic/Microprocessors/Controllers
  • Multimedia, PC Chipsets 3D Graphics

TQFP-SD is suitable for a variety of applications including memory integration (ASIC or Logic), chipset integration (Analog/ Digital), mixed technologies integration (Baseband/RF), handheld products (Cellular Phones, Pagers, MP3 Players, GPS), consumer electronics (Internet applications, Digital Cameras/Camcorders), computers (Network PCs), and PC peripherals (Disk Drivers, CD-R/RW, DVD Drivers).  


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