Fine Pitch Ball Grid Array Stacked Die (FBGA-SD)

STATS ChipPAC’s Fine Pitch Ball Grid Array Stacked Die (FBGA-SD) offering includes LFBGA-SD, TFBGA-SD, VFBGA-SD, WFBGA-SD and UFBGA-SD packages. STATS ChipPAC’s chip stack technology offers the flexibility of stacking 2 to 7 die in a single package. Die to die bonding capability enables device and signal integration to improve electrical performance and reduce overall package I/O requirements. Wafer thinning technology, overhang wire bond technology and the use of spacers between stacked die provide the flexibility to stack almost any desirable configuration of die in one package. This capability uses existing assembly infrastructure, which results in more functional integration with lower overall package cost. The use of the latest packaging materials allows this package to meet JEDEC Moisture Resistance Test Level 2a with Lead-free reflow conditions. This is an ideal package for integrating memory for mobile phones. It is also used to integrate logic and memory, logic and analog, or combinations of memory, logic, analog and RF.


  • Laminate substrate-based package enabling 2, 3 and 4 layers of routing flexibility
  • Available in 1.4mm to 1.7mm (LFBGA-SD), 1.2mm (TFBGA-SD), 1.0mm (VFBGA-SD), 0.80mm (WFBGA-SD) and 0.65mm (UFBGA-SD) maximum package thickness
  • Stacking of die allows for more functionality in an array molded, cost effective, space saving package solution
  • 2 die to 7 die stack with spacer capability
  • 4 x 4mm to 23 x 23mm body size
  • Package height at 0.65, 0.80, 1.0, 1.2, 1.4 & 1.7mm max.
  • Flexible die stacking options ("pyramid," "same die," etc.)
  • 0.4mm to 1.0mm ball pitch; eutectic & lead-free solder ball; smaller ball for reduced height
  • Memory, Logic, Analog & RF device combinations
  • JEDEC standard package outlines
  • Die thinning down to 40um 
  • Low loop wire bonding; reverse & die to die
  • Up to 2mm die overhang per side
  • Halogen-free & low-K wafer compatible BOM
  • Film spacer capability for decreased die stack thickness
  • Very thin substrate capability
  • Capability to integrate discrete passives or integrated passive devices
  • Test capability


  • Suitable for a variety of applications including memory integration
  • Chipset integration (Analog/Digital), mixed technologies integration (Baseband/RF)
  • Handheld products (Cellular Phones, Gaming, MP3 Players, GPS)
  • Consumer electronics (Internet applications, Digital Cameras/Camcorders)
  • Other applications requiring device integration in minimal form factors


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