Stacked Die Plastic Ball Grid Array (PBGA-SD)
STATS ChipPAC’s chip stack technology offers the flexibility of stacking 2 to 7 die in a single package. The Stacked Die Plastic Ball Grid Array (PBGA-SD) package takes advantage of the proven high electrical and thermal performance of STATS ChipPAC’s PBGA packages, with efficient use of space made possible through die stacking technology. STATS ChipPAC’s PBGA-SD packages using laminate substrates are available in a variety of body sizes and ball counts, combining advanced assembly processes and proven material sets for enhanced yield, reliability and performance.
Features
- Increased sub-system performance achieved by integrating multiple chips into a single package
- Die to die bonding capability for device/signal integration
- 15 x 15mm to 40 x 40mm body sizes available
- Ball counts up to >1000 balls
- 0.80, 1.00, 1.27 and 1.5mm ball pitch
- SnPb and Pb-free balls available
- Full in-house design capability with wide range of custom and open tool designs
- Full in-house electrical, thermal and mechanical simulation and measurements capability
- Multiple chip design and optional passive/discrete components available
- Standard 2, 4 and 6 layer substrates as well as high density substrate options
- Pb free and green material set options
- Multiple routing layers and dedicated ground/power planes available for improved electrical and thermal performance
End Applications
- DSPs and Memory
- Gate Arrays
- ASICs
- PC Chipsets and Peripherals
- Microprocessors/Controllers
- Others