Global Characterization Services
STATS ChipPAC's package characterization strategy is simple: streamlined design input . . . minimized setup time . . . state of the art software tools and computers . . . customized data delivery to meet customer needs. STATS ChipPAC’s worldwide Package Characterization team provides support from centers of excellence located in Singapore, Tempe, Arizona, and Ichon, South Korea.
Simplified Package Modeling: Thermal and Electrical
STATS ChipPAC offers innovative simulation services called Simplified Package Modeling (SPM). SPM is available for both Thermal (SPM-T) and Electrical behavior (SPM-E). The goal of SPM is to reduce cycle time by performing accurate simulation early in the design process.
SPM-T: Can occur as soon as a customer identifies the basic package design requirements, without the need to wait for the final substrate or leadframe design.
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SPM-E: Used to determine the RLC parasitic behavior of any design, quickly providing distributed electrical data for the entire package.
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System Level Electrical Analysis
STATS ChipPAC understands the influence of package interconnects on the overall system level signal integrity and power integrity. When it comes to high speed digital, RF or mixed signal ICs, our customers are looking for optimum package performance that compliment the robustness of their chip designs in an actual system environment. STATS ChipPAC delivers that by using best-in-class, high-end 3D field solvers to predict and optimize the wideband electrical performance of its high speed package interconnect designs. Such package performance data is subsequently used in system level models that are solved in time domain and/or frequency domain to gain a deeper understanding of the package’s influence on system performance.
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