PBGA

Plastic Ball Grid Array (PBGA)



STATS ChipPAC’s Plastic Ball Grid Array (PBGA) packages utilize laminate substrates and are available over a variety of standard JEDEC body sizes and ball counts to meet a wide range of customer requirements. This package provides a cost-effective advanced packaging solution, offering higher density over traditional leadframe packages.

STATS ChipPAC’s Plastic Ball Grid Array - Heat Spreader (PBGA-H) package is a cost-effective, thermally enhanced version of the PBGA package that features a formed, one piece heat spreader integrated into the mold cap and exposed at the PBGA package surface. This enables further board or system level thermal enhancement by the package end-user. The PBGA-H leverages STATS ChipPAC’s extensive portfolio of tooled PBGA body sizes and ball counts.

STATS ChipPAC’s Plastic Ball Grid Array - Multi-Die (PBGA-MD) package provides a cost-effective advanced packaging solution and is a direct extension of our single die product offerings to multi-die configurations. STATS ChipPAC’s PBGA-MD offerings support either side by side and/or stacked die configurations.

STATS ChipPAC’s chip stack technology offers the flexibility of stacking 2 to 7 die in a single package. The Stacked Die Plastic Ball Grid Array (PBGA-SD) package takes advantage of the proven high electrical and thermal performance of STATS ChipPAC’s PBGA packages, with efficient use of space made possible through die stacking technology.

STATS ChipPAC’s advanced design and simulation capabilities enable package optimizations needed for maximum electrical and thermal performance. STATS ChipPAC combines state of the art processing and equipment with proven material sets to achieve enhanced yield, reliability, and performance. Green and lead-free material sets are available for all PBGA package types.

Features

  • Strip molded, cost effective, high I/O package solutions
  • Full in-house package and substrate design capability with wide range of custom and open tool designs
  • Full in-house electrical, thermal and mechanical simulation and measurement capability
  • Multiple metal layer options for signal, power and ground planes for improved electrical performance
  • Flexible body sizes ranging from 15 x 15mm to 40 x 40mm
  • 0.65, 0.80, 1.00, 1.27 and 1.50mm ball pitch with greater than 1000 I/O available
  • Perimeter or full ball array
  • Available with 1 piece formed, drop-in heat spreader (PBGA-H)
  • Heat spreader version offers high density routing and tailless substrate technology
  • Multi-die version (PBGA-MD) enables space efficient, side-by-side and stacked die (SD) options
  • Multiple chip design and optional passive/discrete components available (SiP)
  • Increased sub-system performance achieved by integrating multiple chips into a single package
  • Stacked configuration enables die to die bonding capability for device/signal integration
  • Standard 2, 4 and 6 layer substrates as well as high density substrate options in stacked version
  • Multiple routing layers and dedicated ground/power planes available in stacked version for improved electrical and thermal performance
  • SnPb and Pb-free balls available
  • Pb-free and green material set options
  • JEDEC standard compliant

Applications

  • ASIC
  • DSPs and Memory
  • Gate Array
  • Microprocessors/Controllers/Graphics
  • PC Chipsets
  • Other advanced applications requiring enhanced thermal and electrical performance


 

 

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