Press Release

STATS ChipPAC and UMC Unveil World’s First 3D IC Developed under an Open Ecosystem Model

Package-level reliability success is a significant milestone towards the prove-out of a full-scale 3D IC solution for customers

Hsinchu, Taiwan, January 29, 2013 – STATS ChipPAC Ltd. (SGX-ST: STATSChP), a leading semiconductor advanced packaging and test service provider, and United Microelectronics Corporation (NYSE: UMC; TWSE: 2303) ("UMC"), a leading global semiconductor foundry, today announced the world’s first demonstration of TSV-enabled 3D IC chip stacking technology developed under an open ecosystem collaboration. The 3D chip stack, consisting of a Wide I/O memory test chip stacked upon a TSV-embedded 28nm processor test chip, successfully reached a major milestone on package-level reliability assessment. This success demonstrates a total solution for reliable 3D IC manufacturing through the combination of UMC’s foundry and STATS ChipPAC’s packaging services.

”The next level of chip integration is rapidly evolving, and 3D IC technology is poised to enable the next frontier of IC capabilities for customers under various deployment models.” said Shim Il Kwon, VP of Technology Innovation of STATS ChipPAC, “The open ecosystem collaborative approach drives proven and reliable 3D IC solutions for the semiconductor market by combining the foundry partner’s robust, leading-edge TSV and front-end-of-line (FEOL) process technologies in a complementary platform with an Outsourced Semiconductor Assembly and Test (OSAT) service provider with innovative engineering excellence to seamlessly integrate mid-end-of-line (MEOL) and back-end-of-line (BEOL) 3D IC processes. We are pleased with UMC’s commitment to this role and look forward to future collaborations. The results are a proven solution platform that will enable customers to capitalize on new market opportunities.”

S.C. Chien, vice president of Advanced Technology Development at UMC, said, “We see no imperative to restrict 3D IC to a captive business model, as UMC’s development work with nearly all the major OSAT partners for 3D IC has been very productive. Our successful collaboration with a leading OSAT partner like STATS ChipPAC has further established the viability of an open ecosystem approach. This model should work especially well for our mutual 3D IC customers, as foundry and OSAT can utilize their respective core strengths during development and delivery, while customers can benefit from keeping supply chain management flexible and realize better transparency over technology access compared to closed, captive 3D IC business models.”

UMC and STATS ChipPAC’s proven open ecosystem 3D IC approach sets an important standard for collaboration within the industry supply chain to achieve mutual success. Under the 3DIC open development project with STATS ChipPAC, UMC provides the FEOL wafer manufacturing, with a foundry grade fine pitch, high density TSV process that can be seamlessly integrated with UMC’s 28nm poly SiON process flow. The know-how developed will be applied towards implementation on the foundry’s 28nm High-K/metal gate process. For MEOL and BEOL, STATS ChipPAC performs the wafer thinning, wafer backside integration, fine pitch copper pillar bump and precision chip-to-chip 3D stacking.

About STATS ChipPAC Ltd.

STATS ChipPAC Ltd. is a leading service provider of semiconductor packaging design, assembly, test and distribution solutions in diverse end market applications including communications, digital consumer and computing. With global headquarters in Singapore, STATS ChipPAC has design, research and development, manufacturing or customer support offices throughout Asia, the United States and Europe. STATS ChipPAC is listed on the SGX-ST. Further information is available at www.statschippac.com.

About UMC

UMC (NYSE: UMC, TWSE: 2303) is a leading global semiconductor foundry that provides advanced technology and manufacturing for applications spanning every major sector of the IC industry. UMC’s customer-driven foundry solutions allow chip designers to leverage the company’s leading-edge processes, which include 28nm poly-SiON and gate-last High-K/Metal Gate technology, mixed signal/RFCMOS, and a wide range of specialty technologies. Production is supported through 10 wafer manufacturing facilities that include two advanced 300mm fabs; Fab 12A in Taiwan and Singapore-based Fab 12i. Fab 12A consists of Phases 1-4 which are in production for customer products down to 28nm. Construction is underway for Phases 5&6, with future plans for Phases 7&8. The company employs over 13,000 people worldwide and has offices in Taiwan, Japan, Singapore, Europe, and the United States. UMC can be found on the web at http://www.umc.com.

Note From UMC Concerning Forward-Looking Statements

Some of the statements in the foregoing announcement are forward looking within the meaning of the U.S. Federal Securities laws, including statements about future outsourcing, wafer capacity, technologies, business relationships and market conditions. Investors are cautioned that actual events and results could differ materially from these statements as a result of a variety of factors, including conditions in the overall semiconductor market and economy; acceptance and demand for products from UMC; and technological and development risks. Further information concerning these risks is included in UMC’s filings with the U.S. SEC, including on Form F-1, F-3, F-6 and 20-F, each as amended.