IPD

Integrated Passive Devices (IPD)

Chip Scale Module Packaging

Chip Scale Module Packaging (CSMP) is an advanced system-in-package (SiP) solution which features a modular architecture that integrates mixed IC technologies and a wide variety of passive devices (IPD) such as resistors, capacitors, inductors, filters, BALUNs, transceivers, receivers and interconnects directly onto a silicon substrate. The result is a high performance system level solution, which provides a significant reduction in die size, weight, number of interconnections and system board space requirements, and can be used for many applications.

Enabling IPD Technology

STATS ChipPAC’s IPD technology is a key enabler of its innovative CSMP offering which features silicon-based passive integration of RLC components. IPDs are a cost effective way to reduce footprint, reduce interconnection complexity, improve component tolerance, yield and reliability. By integrating and fabricating passive devices at the silicon wafer level, STATS ChipPAC is able to fabricate IPDs which are significantly smaller, thinner and with higher performance than standard passive devices.

To achieve superior IPD performance, STATS ChipPAC employs a copper metallization process capable of depositing 8 microns or more of copper on a silicon wafer. This results in higher Q components that reduce loss in the RF signal transmission path, thereby increasing battery performance of the wireless system and improving reception. The size of matching circuitry and filters is often reduced by 40%.

IPD Component Library

STATS ChipPAC’s foundry service includes fully characterized resistor, capacitor, inductor, filter, BALUN, transceiver, and receiver libraries complete with full electrical models of all library components for packages such as the QFN, LFBGA, FLGA and eWLB. In addition to standard IPD library solutions, customized IPD designs are also available. Refer to STATS ChipPAC's IPD Products Databook (2nd ed.) for a comprehensive list of IPD products that can be integrated into RF SiP solutions.

A Comprehensive RF Solution

TSV STATS ChipPAC provides the highest level integration of wireless systems. With leading edge technology in CSMP, IPD, eWLB, 3D packaging and a comprehensive RF solutions portfolio, including wafer sort, design, assembly, RF test and supply chain management, STATS ChipPAC offers RF semiconductor companies a complete turnkey solution and distinct competitive advantage in their market.

Features

  • Embedded RLC components with excellent performance
  • Resistors to 100,000 ohms
  • Capacitors range: 0.2pF-100pF
  • Inductors to 30nH
  • IPD diplexers, filters for wireless applications
  • Compact BALUNS for RF applications
  • Computerized component generation for fast flawless design (1st run silicon success is typical)
  • Library RLC components, filters and BALUNS for GSM, DCS, PCS, GPS and WLAN a/b/g
  • Full electrical models of all library components
  • Full foundry services available
  • Foundry matrix mask space available
  • Packaging available in QFN, FBGA, FLGA and eWLB formats

Applications

  • RF Power Amplifier Matching/Filters/Couplers
  • Front End Modules (FEM)
  • GSM/DCS and CDMA cellular phones
  • Wireless LAN 802.11 a/b/g and WiMax systems
  • 802.11a/b/g and WiMax filters
  • GPS Systems
  • Functional Interposers
  • BALUNs from 750MHz-6GHz
  • Multi-band RF Transceivers
  • Miniaturization of RF Systems


Illustration above shows a sample eWLB module containing a CMOS power amplifier chip at the right and an IPD chip at the left. The IPD chip is used for matching and filtering functions. The interconnection between the CMOS chip and the IPD chip is made by RDL through eWLB process.  

 

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