Press Release

STATS ChipPAC Expands AEC-Q100 Qualification of eWLB for Automotive Applications

Grades 1 and 2 qualification supports a wider range of infotainment, GPS and radar applications

Singapore 2 May 2018 – STATS ChipPAC Pte. Ltd. (“STATS ChipPAC” or the “Company”), a leading provider of advanced semiconductor packaging and test services, announced today the expanded qualification of its embedded Wafer Level Ball Grid Array (eWLB) technology for Grades 1 and 2 of the AEC-Q100 standards established by the Automotive Electronics Council (AEC).

The AEC is an organization based in the United States that sets qualification standards for the supply of components in the global automotive electronics industry. The AEC-Q100 standard defines critical stress tests and qualification requirements for the purpose of qualifying an integrated circuit (IC) for automotive applications. Based on the AEC-Q100 standard, ICs must pass stringent test requirements within specific temperature ranges defined for grade levels from 0 to 4. Grade 0 is the most stringent standard, requiring an operating temperature range of -40 to +150 degrees Celsius. A Grade 1 device must operate in strenuous conditions from -40 to +125 degrees Celsius while a Grade 2 device must meet requirements within a -40 to +105 degrees Celsius operating environment.

“Automotive devices operate in harsh environments that require long-term, reliable system operation over a wide temperature range. Our factory has been ISO/TS 16949 certified for over 10 years, and we have been actively working with multiple automotive customers over the last 5 years to expand our eWLB qualification. eWLB has passed 1000 cycles at -55/150°C for Grade 1 qualification and met Grade 2 requirements of 1000 cycles at -55/125°C. Our success in meeting the stringent AEC standards demonstrates our commitment to serve our customers across a wide range of automotive applications and operating conditions,” said Cindy Palar, Managing Director of STATS ChipPAC’s Singapore operation. 

STATS ChipPAC Singapore’s qualification of AEC-Q100 Grade 1 and 2 for eWLB expands the automotive capabilities for the JCET Group of companies. With automotive manufacturing experience extending back to 2005, Jiangsu Changjiang Electronics Technology Co., Ltd. (JCET) is qualified to the highest AEC-Q100 standards, Grades 0 and 1, for discrete and power packages. As the automotive market rapidly evolves toward driver-assisted or fully autonomous vehicles, the qualification of eWLB provides semiconductor companies with an advanced technology solution for applications such as infotainment, GPS, and high frequency radars in Advanced Driver Assistance Systems (ADAS).

“Our eWLB AEC-Q100 qualification underscores the JCET Group’s commitment to meeting the rigorous quality standards required by customers in the automotive industry. eWLB provides an excellent high-frequency performance solution with proven reliability for our customers in automotive infotainment, GPS and radar applications. For ADAS radar applications, in particular, eWLB is a competitive solution for wireless systems that operate in the high-end, 77GHz millimeter-wave frequencies. This is an example of a rapidly growing market for eWLB which requires a more stringent level of automotive qualification,” said Hal Lasky, Executive Vice President and Chief Sales Officer, STATS ChipPAC.

Forward-Looking Statements

Certain statements in this release, including statements regarding the Company’s eWLB technology, are forward-looking statements that involve a number of risks and uncertainties that could cause actual events or results to differ materially from those described in this release. Factors that could cause actual results to differ include, but are not limited to, general business and economic conditions and the state of the semiconductor industry; prevailing market conditions; demand for end-use applications products such as communications equipment, consumer and multi-applications and personal computers; decisions by customers to discontinue outsourcing of test and packaging services; level of competition; our reliance on a small group of principal customers; our continued success in technological innovations; pricing pressures, including declines in average selling prices; intellectual property rights disputes and litigation; our ability to control operating expenses; our substantial level of indebtedness and access to credit markets; potential impairment charges; availability of financing; changes in our product mix; our capacity utilization; delays in acquiring or installing new equipment; limitations imposed by our financing arrangements which may limit our ability to maintain and grow our business; returns from research and development investments; changes in customer order patterns; customer credit risks; disruption of our operations; shortages in supply of key components and disruption in supply chain; disruption of our operations and other difficulties related to the relocation of our China operations; loss of directors, key management or other personnel; defects or malfunctions in our testing equipment or packages; rescheduling or cancelling of customer orders; adverse tax and other financial consequences if the taxing authorities do not agree with our interpretation of the applicable tax laws; our ability to develop and protect our intellectual property; changes in environmental laws and regulations; exchange rate fluctuations; regulatory approvals for further investments in our subsidiaries; ownership of our ordinary shares by Jiangsu Changjiang Electronics Technology Co., Ltd. (“JCET”) which may have conflicting interests with other holders of our securities; our inability to capture all or any of the benefits from acquisitions and investments in other companies and businesses or from the acquisition of us in August 2015 by JCET-SC (Singapore) Pte, Ltd., which is now wholly-owned by JCET; loss of customers or failure to compete effectively with our former Taiwan subsidiaries which we have recently divested; labor union problems in South Korea; uncertainties of conducting business in China and changes in laws, currency policy and political instability in other countries in Asia; and natural calamities and disasters, including outbreaks of epidemics and communicable diseases. STATS ChipPAC does not intend, and does not assume any obligation to update any forward-looking statements to reflect subsequent events or circumstances. References to “$” are to the lawful currency of the United States of America.

About STATS ChipPAC Pte. Ltd.

STATS ChipPAC Pte. Ltd. is a leading service provider of semiconductor packaging design and characterization, wafer bump, assembly and test solutions for diverse end market applications in communications, digital consumer, computing and automotive electronics. Headquartered in Singapore, STATS ChipPAC has design, research and development, manufacturing and customer support offices throughout Asia, the United States and Europe. STATS ChipPAC is a member of the JCET Group of companies. Further information is available at www.statschippac.com. Information contained in this website does not constitute a part of this release.

About JCET

Founded in 1972, Jiangsu Changjiang Electronics Technology Co., Ltd. (“JCET”) is one of the top semiconductor packaging and test providers in the world and the largest provider in China. With full turnkey services encompassing design and characterization, wafer bump, packaging and test, JCET is a strategic partner for semiconductor companies across a broad range of markets and applications. The comprehensive packaging portfolio of JCET and its subsidiaries include discrete, leaded, laminate, flip chip, Molded Interconnect System, wafer level packaging and System-in-Package technologies. Headquartered in Jiangyin, Jiangsu, China, JCET has an extensive global manufacturing base with operations in China, Singapore and South Korea. JCET is a publicly-traded company that is listed on the Shanghai Stock Exchange. Further information is available at www.jcetglobal.com.